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Mostrati risultati da 1 a 20 di 199
collection Anno Titolo Autore file(s)
Lauree Magistrali 2014/2015 20Gb/s Adaptive Linear Equalizer in 28nm CMOS: Analysis and Measurement Results ZHANG, HONGYANG
Lauree Magistrali 2022/2023 3RD ORDER ADC SAR WITH NOISE-SHAPING ARCHITECTURE AND kT/C NOISE CANCELLATION SIVIERO, MATTEO
Lauree Magistrali 2019/2020 A foreground calibrated low-power SAR ADC with sub-nA resolution BERTUCCA, ANDREA
Lauree Magistrali 2015/2016 A mixed supervision system for industrial control and building automation. BARTOLOMEO, CLAUDIO
Lauree Magistrali 2018/2019 A Second-Order Continuous-Time Incremental A/D Converter ROSSETTI, LUCA
Lauree Magistrali 2020/2021 A single op-amp second-order trans-impedance filter with an all-pass filter in the signal path for RF receivers ARISI, STEFANO
Lauree Magistrali 2016/2017 A single photon source for experiments on the foundations of quantum mechanics ZAMBIANCHI, ALBERTO
Lauree Magistrali 2019/2020 A study of High Speed single bit circuits MAGA, GIANLUCA
Lauree Magistrali 2017/2018 A time variant, 80dB dynamic range, 4.5MHz, analog readout channel for X-ray imaging at FELs SOHAL, KARAN
Lauree Magistrali 2016/2017 Activity acquisition for holter monitor data RUFFINI, NICCOLÒ
Lauree Magistrali 2021/2022 Advanced Architectures of Sensor Fusion and Cooperation: a Track-Level application. REPOSSI, ELENA
Lauree Magistrali 2018/2019 Algorithm for self-mixing laser signal processing for high-speed and large displacements MARCUCCIO, STEFANO
Lauree Magistrali 2018/2019 Algorithms for stereo-based depth computation: review, selection and tailoring to an IR sensor case BERNOLDI, SILVIA
Lauree Magistrali 2014/2015 An Active N-Path notch filter for self-interference cancellation for diversity receivers. MONTANARI, DANIELE
Lauree Magistrali 2020/2021 An array of slotted waveguide antennas in air-filled substrate integrated waveguide for 5G applications. GIYAD, SURESH
Lauree Magistrali 2014/2015 An Optimal Planar Array-Antenna Lattice for Pyramidal Scanning SICILIANO, GIUSEPPE
Lauree Magistrali 2015/2016 Analysis and Design of a 56 Gb/s PAM4 Un-Clocked Decision Feedback Equalizer in 16nm FinFET PETRICLI, IBRAHIM
Lauree Magistrali 2020/2021 Analysis and design of a high efficiency monolithic Resonant Switched-Capacitor Converter for low power application FARINA, ALESSANDRA
Lauree Magistrali 2020/2021 Analysis and design of a parallel counter in 110 nm CMOS technology GIROLETTI, SIMONE
Lauree Magistrali 2021/2022 Analysis and Design of Capacitively Coupled Level Shifter Architectures for Motor Control PWM Applications CANATO, LUCA
Mostrati risultati da 1 a 20 di 199
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