Design of a Programmable Word Line Voltage Regulator for Analog in Memory Computing based on PCM Arrays

Data-centric computation and the scalability restrictions of existing computing systems need the development of alternatives to von-Neumann architecture. As a result of increasing data, more and more energy is consumed in the data movement; the bus bandwidth could also become a limitation. There is no doubt that technology that describes and models human life will be artificial intelligence (AI) in the coming decades. However, current computing systems are inherently limited in energy efficiency and data bandwidth by the physically separated memory and processing units (von Neumann bottleneck), together with the disparity between the speed of the memory and processing units (memory wall). It has been determined that for many computing tasks, data transportation consumes most of the energy and time rather than computation. Therefore, to reach the goal of efficient computing, the need for alternative hardware design has arisen; emerging non-volatile memory (eNVM) devices where memory and CPU are gathered like in the biological brain, analog in-memory computing.