Multi-bit DACs rely on techniques such as Data Weighted Averaging to mitigate nonlinearities caused by mismatch. Power dissipation and complexity of DWA increase exponentially with the number of bits. In this work a pointer based low complexity architecture that features reduced power dissipation as the number of bits increases is proposed.
Architetture a bassa potenza per l'implementazione di un algoritmo di Data Weighted Averaging per DAC sovracampionati nell'ordine di alcuni GBps
Low power Data Weighted Averaging architectures for GBps oversampled DACs
GUIDO, ALESSIO
2020/2021
Abstract
Multi-bit DACs rely on techniques such as Data Weighted Averaging to mitigate nonlinearities caused by mismatch. Power dissipation and complexity of DWA increase exponentially with the number of bits. In this work a pointer based low complexity architecture that features reduced power dissipation as the number of bits increases is proposed.È consentito all'utente scaricare e condividere i documenti disponibili a testo pieno in UNITESI UNIPV nel rispetto della licenza Creative Commons del tipo CC BY NC ND.
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https://hdl.handle.net/20.500.14239/13033