This thesis presents the design of a fast comparator based peak stretcher aimed at measuring the amplitude of incoming signals in particle detectors that rely on low gain avalanche diodes (LGADs). The peak stretcher is designed to detect signals with a fast peaking time of 10 ns and features a dynamic range of 700 mV. The architecture has been optimized for low amplitude error with fast signals while minimizing power consumption. The peak stretcher has been implemented using 65 nm CMOS technology as part of the front-end design circuit for the readout of LGAD-based particle detectors for the next generation of spaceborne experiments. This thesis describes and discusses the design, architecture, and simulation outcomes of the proposed circuit.
This thesis presents the design of a fast comparator based peak stretcher aimed at measuring the amplitude of incoming signals in particle detectors that rely on low gain avalanche diodes (LGADs). The peak stretcher is designed to detect signals with a fast peaking time of 10 ns and features a dynamic range of 700 mV. The architecture has been optimized for low amplitude error with fast signals while minimizing power consumption. The peak stretcher has been implemented using 65 nm CMOS technology as part of the front-end design circuit for the readout of LGAD-based particle detectors for the next generation of spaceborne experiments. This thesis describes and discusses the design, architecture, and simulation outcomes of the proposed circuit.
Fast comparator based peak stretcher for amplitude measurement in LGAD based particle detector system
PERUMAL, PRAVEEN KUMAR
2023/2024
Abstract
This thesis presents the design of a fast comparator based peak stretcher aimed at measuring the amplitude of incoming signals in particle detectors that rely on low gain avalanche diodes (LGADs). The peak stretcher is designed to detect signals with a fast peaking time of 10 ns and features a dynamic range of 700 mV. The architecture has been optimized for low amplitude error with fast signals while minimizing power consumption. The peak stretcher has been implemented using 65 nm CMOS technology as part of the front-end design circuit for the readout of LGAD-based particle detectors for the next generation of spaceborne experiments. This thesis describes and discusses the design, architecture, and simulation outcomes of the proposed circuit.| File | Dimensione | Formato | |
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Thesis_Perumal__Praveen_501886_Comparator_based_fast_peak _stretcher.pdf
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Descrizione: Master's Thesis
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https://hdl.handle.net/20.500.14239/33321