A Broadband Switched-Capacitor LNA Based Receiver For 6G

Wireless devices have become indispensable companions enabling ubiquitous connectivity for applications ranging from ultra-high-definition video streaming and augmented reality to massive IoT deployments and mission-critical communications. The evolution of wireless communication technologies toward sixth-generation systems demands higher data rates, improved spectral efficiency, and enhanced quality of service. This in turn, requires circuits with excellent noise performance, exceptional linearity, and broadband operation capabili- ties, along with significant reductions in power consumption and system complexity. Current wireless receiver architectures rely on conventional LNA-first topologies that face fundamental limitations in power efficiency, and broadband operation. This thesis intro- duces a broadband switched-capacitor LNA based receiver architecture, departing from tra- ditional LNA-first designs, addressing fundamental challenges of wideband input match- ing, power efficiency, noise performance, and linearity in modern RF receivers. First, funda- mentals of RF circuit analysis and a review on switched-capacitor topologies are presented, followed by a full discussion of the proposed circuit including theoretical modeling and ver- ification by simulation results. The proposed architecture comprises three main building blocks: a voltage-mode boosting switched-capacitor mixer, an optimized baseband amplifier chain, and a negative transla- tional loop feedback network. The switched-capacitor mixer enables high linearity while providing frequency translation with minimal power consumption. The baseband ampli- fier chain consists of an inverter-based Low-Noise Transconductance Amplifier (LNTA) fol- lowed by a Transimpedance Amplifier (TIA), achieving optimal loop gain. A translational loop feedback network is implemented to provide broadband input matching capabilities while maintaining inherently low noise characteristics through careful loop design and op- timization. To enhance linearity performance, a novel parallel LNTA feedforward compensation tech- nique is developed. This approach employs an auxiliary LNTA operating in parallel with the main transconductance path, processing an inverted input signal scaled by a factor. The auxiliary LNTA transconductance is systematically designed to cancel third-order distortion.