Design of a Nanopower NMOS-Based LDO for Wearable Applications

The increasing demand for portable and wearable electronic devices, together with the rapid expansion of Internet of Things (IoT) applications, has accel erated the development of ultra-low-power integrated circuits capable of oper ating under severe energy constraints. In these systems, power consumption represents one of the most critical design challenges, not only for the func tional blocks but also for the power management circuits responsible for gen erating and regulating the supply voltages required by the system. This thesis presents the design and analysis of a nano-power LDO regulator optimized for ultra-low-power applications. The proposed architecture investigates cir cuit design techniques aimed at minimizing quiescent current while main taining adequate voltage regulation and dynamic performance over a wide range of operating conditions. The proposed LDO architecture is designed and evaluated through circuit-level simulations, with particular emphasis on key performance metrics such as output voltage regulation, dropout voltage, quiescent current, transient response, and stability.